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Hardware

This page records the main board PCB revision history for CamThink hardware products.

NeoEyes NE101​

HardwareDateChanges
V2.02026-01-14
  • Merge TF card power control pin with module power control (Cat.1/HaLow), shared IO48
  • Camera, fill light, and battery level detection control moved from IO3 to IO42
  • Dedicated IO3 for RTC interrupt detection
  • RTC chip shares I2C bus (IO4 and IO5)
  • Improve DCDC output stability, change inductor from 2.2μH to 4.7μH
  • Remove shield clip soldering
V1.22025-07-01
  • Replace Schottky diode D6 in power selection circuit (PMEG60T30ELR, low reverse leakage)
  • Change fill light R73 from NC to 100K
  • Change USB insertion indicator from green LED to red LED
  • Change button silkscreen labels to start with K
  • Add capacitor at DCDC input for sufficient energy storage under low voltage
  • Staggered soft-start for camera and fill light power supplies (C31 0.1μF, C45 0.47μF, MOS gate-to-ground 100K)
  • Improve DCDC dynamic response, change inductor from 4.7μH to 2.2μH
  • Change ISP to single 22μF capacitor; enlarge silkscreen for main ICs; add IO function labels on rear connector terminals
V1.12025-04-12
  • Change fill light to female connector with plug-in module
  • Raise HaLow and Cat.1 module female connectors, total height unchanged
  • Change IO pin arrangement on female connectors
  • Fix PCBA burr issue: change panelization to V-CUT
  • Add PIR support with additional LDO power supply and 4-pin wafer connector
  • Modify all power control circuits with soft-start
V1.02024-12-10Initial design

NeoEyes NE301​

HardwareDateChanges
V1.32026-01-20
  • Replace LDO with TPS7A2633DRVR
  • Change WiFi 1.8V LDO pull-down resistor to direct connection
  • Add dedicated PIR interface; keep ISP independent
  • Add VCC_IN output compatibility for UART
  • Add IR-CUT driver circuit
V1.22025-10-20
  • Add U0 reset button
  • Remove U0 reserved SPI and WiFi STA connection pins
  • Force PWM mode on MPS1462 with VCC pull-up
  • Mark R154, R156, R138, R145 as NC
  • Add pull-up to SPI2 clock, SPI4 clock and CS pins
  • U0 controls N6 reset
V1.12025-07-28
  • Change light sensor circuit to LED indicator (light sensor compatible); trigger button and alarm interface compatible with U0/N6 IO detection (standby-capable); ISP and PIR compatible with U0/N6 control, supporting both 3.3V and battery power; add WiFi matching circuit parameters
  • Swap SPI2 and SPI4 interfaces; modify to be compatible with SAI audio
  • Add PoE/USB power source priority switching circuit; add pull-down resistors to soft-start control circuits
  • N6 IO power compatible with 1.8V; modify MCU boot defaults for USB/UART, change BOOT0/BOOT1 pull-up to 10K
  • Add missing WiFi chip power domain; some IO power compatible with 1.8V
  • Isolate Flash RST from N6 RST with diode
  • Add 4×100μF capacitors at VCC IN for energy storage
  • Remove audio chip circuit
  • Add U0 chip control circuit for N6 startup and default WiFi/Cat.1 module power-on control
V1.02025-04-12Initial design

NeoEdge NG4500​

HardwareDateChanges
V1.12025-03-20
  • Replace VCM power IC from LM25148 to MPQ4317
  • Add SW2-controlled 5V/10V switching circuit for VCM power
  • Add EEPROM AT24C02D-MAHM-E on I2C2 bus, address 0x57
  • Swap RTL8111H-CG Ethernet LED logic: LED0 ACT→LINK, LED1 LINK→ACT
  • Optimize VCC_3V3 power circuit: C235 1.8nF→4.7nF; R235 6.49K→5.6K; C236 47pF→120pF; R234 23.2K→56K; U52 NTMFS5C670NLT1G→NTMFS5C645NLT1G; L21 1μH→2.2μH; R222 0.005Ω→0.003Ω
  • Add R312 (11.5K) to VDD_5V, set UVLO threshold to 9.6V
  • Change U61/U63 (TXS0108EPWR) enable pin to always-on high; add R251/R257 (10K), R310/R311 (1M)
  • Optimize 2.9V-triggered DI circuit: R258/R259/R265/R266 1K→2K; R255/R256/R263/R264 1K→10K
  • Fix DO circuit bug: swap PMOS D and S pins
  • Change FORCE_RECOVERY from touch button to DIP switch
  • Change J9/J10/J37 FPC connectors from vertical to horizontal
V1.02024-10-30Initial design